/*
 * main.c
 */

#include <msp430.h>
#include <stdint.h>

/*
	output values of the synthesizer lines are inverted
	from the MC145158 as the lines are inverted buffered
	7/2/14
	Testing the synthesizer fully.
*/

// ...........
#define SYNTH_PORT_DIR	P1DIR
#define SYNTH_PORT		P1OUT

#define SYNTH_DATA		BIT0
#define SYNTH_CLOCK		BIT1
#define SYNTH_LATCH		BIT2

//14.4Mhz / 2880 = 5Khz; shift <<2; | 0x02 for ctrl bit
#define SYNTH_REF_DIV	0x2d02

#define SIZE_SYNTH_REF	15 //reg + ctrl size
#define SIZE_SYNTH_OUT	18 //dito

// ...........
#define RCTRL_PORT_DIR	P1DIR
#define RCTRL_PORT		P1OUT

// Pin 12 RF board used to switch the
//	range of the VCO
#define RCTRL_PIN		BIT3
// Transmit/receive here low R, high T
#define RCTRL_TR		BIT4

// ........
#define TYPE_VHFLO 0x01
#define TYPE_VHFHI 0x02
#define TYPE_UHF   0x04
//#define TYPE_UHF

// ........
//globals keep the debugger from getting confused
uint16_t wd_flag= 0;
//uint32_t freq_tx= 152020000;
uint32_t freq_tx= 446350000;
uint16_t channel_space= 5000;
uint32_t freq_t;
uint32_t test;
uint8_t board_type;

int main(void)
{
	board_type= TYPE_UHF;

	WDTCTL= WDT_ADLY_250;
	//enable the watchdog interrupt
	IE1= WDTIE;


	SYNTH_PORT_DIR|= SYNTH_DATA | SYNTH_CLOCK | SYNTH_LATCH;
    SYNTH_PORT|=  SYNTH_DATA | SYNTH_CLOCK | SYNTH_LATCH;
	RCTRL_PORT_DIR|= RCTRL_PIN | RCTRL_TR;
	RCTRL_PORT|= RCTRL_TR | RCTRL_PIN;

    P1DIR|= BIT6; //home of green launchpad led

//running from here
	_enable_interrupt( );

//send out the reference divider

	uint16_t reg_ref= SYNTH_REF_DIV;
	uint16_t i= 0;
	for( i= 0 ; i < SIZE_SYNTH_REF; ++i )
	{
		if( reg_ref & 0x8000 )
			SYNTH_PORT&= ~SYNTH_DATA;
		else
			SYNTH_PORT|= SYNTH_DATA;

   		SYNTH_PORT&= ~SYNTH_CLOCK;
		SYNTH_PORT|= SYNTH_CLOCK;

		reg_ref<<= 1;
	}
	//now latch in ref
	SYNTH_PORT&= ~SYNTH_LATCH;
	SYNTH_PORT|= SYNTH_LATCH;

	P1DIR^= BIT6;
	wd_flag= 0;
//	}
//load the likes of 152.020Mhz.
	//We will calculate the register values as it may
	// be that frequencies can come from anywhere i.e. a serial port
	// the controlling device should not have to know about the synthesizer

	for( ; ; ) //test loop, this code will be moved to a subroutine.
	{
		if( ! wd_flag )
			continue;

	freq_t= freq_tx / channel_space;
	//the frequency should be evenly divisable by the channel spacing
	//freq_t/= 5000; //Match the channel spacing

	test= freq_t;

	switch( board_type )
	{
	case TYPE_VHFHI:
	{
		//prescaler is 64/65, 6 bits; MC12017
		// so move the A register down one bit
		//this is just one way to do it...
		uint16_t temp= freq_t & 0x7f;
		temp>>= 1;
		freq_t&= 0xffffff80;
		freq_t|= temp;
		//synthesizer N + A registers are 17 bits;
		//shift one less as as A was shifted rather
		//than shifting N up.
		freq_t<<= 16;
		break;
	}
	case TYPE_UHF:
	{
		//prescaler is 127/128 !??, 7 bits
		// NOT 128/129 like the commercial product
		// No moving or math is necessary
		// with an MC12017.
		// but here....
		uint32_t reg_N= freq_t / 127;
		uint16_t reg_A= freq_t % 127;
		freq_t= reg_N << 7;
		freq_t|= reg_A;
		//synthesizer N + A registers are 17 bits;
		freq_t<<= 15;
		break;
	}
	}//board type switch(...)

	test= freq_t;

	for( i= 0; i < SIZE_SYNTH_OUT; ++i )
	{
		if( freq_t & 0x80000000 )
			SYNTH_PORT&= ~SYNTH_DATA;
		else
			SYNTH_PORT|= SYNTH_DATA;

   		SYNTH_PORT&= ~SYNTH_CLOCK;
		SYNTH_PORT|= SYNTH_CLOCK;

		freq_t<<= 1;
	}
	//now latch in out
	SYNTH_PORT&= ~SYNTH_LATCH;
	SYNTH_PORT|= SYNTH_LATCH;

	P1DIR^= BIT6;
	}//test loop

    for( ; ; )
    {
    	if( ! wd_flag )
    		continue;

		P1DIR^= BIT6;
    	wd_flag= 0;
    }
}



#pragma vector=WDT_VECTOR
__interrupt void wdt_interrupt( )
{
	wd_flag= 1;
}